A Survey on Thread-Level Speculation Techniques

A Quantitative Assessment of Thread-Level Speculation Techniques

Speculative thread-level parallelism has been recently proposed as an alternative source of parallelism that can boost the performance for applications where independent threads are hard to find. Several schemes to exploit thread level parallelism have been proposed and significant performance gains have been reported. However, the sources of the performance gains are poorly understood as well ...

Thread-Level Speculation on a CMP Can Be Energy Efficient

While Chip Multiprocessors (CMP) with Thread-Level Speculation (TLS) have become the subject of intense research, processor designers in industry have reservations about their practical implementation. An often cited complaint is that TLS is too energy-inefficient to compete against conventional superscalars. This paper challenges the commonly-held view that TLS is energy inefficient. We identi...

Energy-Efficient Thread-Level Speculation on a CMP

Parallelizing Mudflap Using Thread-Level Speculation on a Chip Multiprocessor

Pointer-use checking is an important technology for detecting pointer and array access errors in unsafe languages like C and C++. However, the large runtime overheads associated with these techniques restrict their usefulness to software development environments. On the other hand, if the execution time overhead from using these techniques can be reduced, not only can they be applied more aggre...

Thread-Level Speculation for Web Applications

Thread Level Speculation (TLS) has been suggested as a mean to automatically (or semi-automatically) extract parallelism from sequential programs. While there have been multiple attempts both in hardware and software to implement real time TLS, to the best of our knowledge all attempts have so far been on a byte code level or with statically typed languages. In this study, we examine the potent...